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• Drive Mosfet With 3.3 V Logic
• Mosfet 3.3 V Logic Circuit
• Mosfet 3.3 V Logic Pro
• Mosfet 3.3 V Logical

Logic Level MOSFET Switches at 3.3V Logic level switches should be used with the LTC1157 when powered from 2.7V to 4V. Although there is some variation among manufacturers, logic level MOSFET switches are typically rated with V GS = 4V with a maximum continuous VGS rating of ±10V. RDS(ON) and maximum VDS ratings are similar to standard MOSFETs. Logic, the MOSFET will change state as soon as the threshold is crossed. First, the threshold voltage V GS(th) is not intended for system designers. It is th e gate voltage at which the drain curre nt crosses the threshold of 250 μA.

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N-channel 30 V 3.3 mΩ logic level MOSFET in D2PAK

Logic level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment.

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N-channel 30 V 3.3 mΩ logic level MOSFET in D2PAK

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• High efficiency due to low switching and conduction losses
• Suitable for logic level gate drive sources

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• Load switiching
• Motor control
• Server power supplies

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Introduction

In a previous article we dealt with the problem of interfacing a 5V output signal to a 3.3V system. In this article we cover the opposite problem: we have a 3.3V output and we need to drive a 5V system.

This is a very typical situation in which we have a 3.3V system (e.g. most of 32-bit systems, such as uChip), and we need to send data to an older 5V system.

First ofall, we need to consider which kind of 5V system we are interfacing. Inparticular, we need to know:

1. The low and high level input andoutput voltages.
2. The input current.

For CMOSinputs, the input current is typically around 1uA or less, therefore there isno such a concern. For TTL devices, the input current might be even more than 1mA (see for instance 7400 datasheet). Therefore, when interfacing with TTLinputs, some additional care should be taken, as we will explain on acase-by-case basis.

Another,and much more important, aspect is represented by the logic levels.

In fact, 5V TTL and 5V CMOS inputs have different logic levels, therefore some of the solutions we will present will be adequate for some inputs, but these could not work reliably for other inputs types.

The main ways to interface a 3.3V output to a 5V input are:

• Direct connection
• Using a 74HCTxx gate (or other 5-V TTL-input compatible families)
• Using a diode offset
• Resistor Offset
• BJT/MOSFET inverter
• Series MOSFET
• Series BJT
• Level Translator IC
• Optocoupler/Isolator

Drive Mosfet With 3.3 V Logic

DIRECTCONNECTION

This is the simplest way. This solution “almost always” works, but with some important warnings.

First, when interfacing with TTL inputs, any “modern” CMOS output will work, as the high level output voltage of a 3.3V CMOS is close to 3.3V (note! The actual output voltage depends on the output current. For heavily loaded outputs, the output levels might vary of 0.5V or more!), still the minimum high-level input voltage for a TTL is 2V. Similarly, if not too much heavily loaded, the low-level output voltage of a CMOS is lower than the maximum low-level TTL input voltages.

We wrote “modern” CMOS because older CMOS chips (e.g. CD4xxx series) have a very high output impedance, therefore they cannot sink/source too much current (you generally do not want to sink/source more than 0.5 mA). Trying to get too much current will make the output voltage shift too much. Older TTL chips have an input current, which might exceed 1mA. Almost all modern CMOS devices (e.g. the GPIOs of MCUs) allows driving a much higher current without problems.

Second, when interfacing to a 5V CMOS devices, this might work, but not reliably. In fact, the high level input voltage of a 5V CMOS is 3.5V. This is even higher than the maximum output voltage you might expect from a 3.3V system (i.e. 3.3V).
Still, why this generally works ? The answer is due to the actual threshold logic level, which is 2.5V for a 5V CMOS. Any voltage above 2.5V would be read as 1, and any voltage below 2.5V would be read as 0.
However, the actual threshold level might shift with temperature and aging: operating between the two logic levels region is not safe. Any noise or disturbance might produce a glitch at the output. If your system must work reliably, then you need other solutions, as shown below.

Furthermore care should be taken when driving a digital non hystereticinput close to the logic level threshold, as current consumption would occur.In fact, consider the simple CMOS inverter, shown below: when the input voltageis close to the VDD/2, both MOSFETs are in the ON state, therefore a directpath current will flow from VDD to GND.

Advantages:

• Noadditional components!
• Fast

Disadvantages:

• Reducednoise margins.
• Worksreliably only with some logic families.

USING A 74HCTxx GATE (or any other logic family with TTL compatible inputs)

The 74HCTxx family series are CMOS devices with TTL compatible logic levels (all the other 5V logic families that have TTL compatible input levels will work too) . In particular, the input high-voltage level is 2V, which is well below the CMOS high output voltage. By inserting any logic gate (see examples below) with TTL-compatible input levels between your systems, you create a suitable voltage level translator.

Advantages:

• Fast
• Workswith both CMOS and TTL devices
• Needonly one power supply.

Disadvantages:

• Requiresan external IC (and possibly its decoupling capacitor)

USING A DIODE OFFSET

With thedirect connection to a 5V CMOS input, we saw that the main issue was the highlevel output voltage of the 3.3V output, which is not high enough to be just inthe safe region (3.3V at most, vs 3.5V minimum). Instead, the maximum voltageof a low level CMOS input is 30% of VDD, i.e 1.5V in a 5V system. Therefore, ifwe could add small offset to the CMOS output, that would be great. For thisreason, one could simply ad a diode and a pull-up resistor.

However, inthis way, current will flow into the output protection diodes of our 3.3Vsystem. Such current should be made as small as possible, to avoid damaging the3.3V system.

A bettersolution is to use an additional diode. Since the new diode is directly connectedto the 3.3V rail (it does not have to pass through our IC), the current willflow preferably there.

Still, boththese solutions has an intrinsic problem: if the 3.3V system is really lowpower, then of course it will consume a very low current. If the total currentconsumption is lower than the current flowing into the resistor, theneffectively, the 3.3V rail will be powered by the 5V, through the resistor anddiode.

This mightbe an issue, as, if no enough current is drawn by the 3.3V system, the 3.3Vvoltage might increase up to about 4.3V, which could damage the 3.3V systemitself.

A simple solution is to put a second resistor, which draws at least the current that would flow into D2 (about 1V/R1. Therefore R2 should be 3.3 times R1 or less).

The valueof the pull-up resistor should be calculated so that:

• Itis low enough to grant us the desired speed.
• Itis much smaller than the input impedance (though in a CMOS device, this is notmuch an issue).
• Itis large enough, not to overload the CMOS output voltage, especially at lowlevel. This is especially an issue on those CMOS output with relatively highoutput impedance (CD40xx series).
• Itis large enough, to avoid too much current flowing into the 3.3V rail.
• Itis large enough, to keep current consumption at an acceptable level.

Advantages:

• Cheap

Disadvantages:

• Much slower than other solutions.
• Requires a careful resistor value selection: to avoid damage, to get a decent speed, and to keep the high and low voltage within the correct ranges.
• Relatively high current consumption.
• Requires 2 to 4 additional components.
• Poor noise margins.
• Requires a low impedance driving output.
• Requires a relatively high input impedance

RESISTOR OFFSET

We canintroduce an offset also using a resistor divider too.

This simplesolution is cheaper (but somewhat slower) than the diode-offset, and still hasthe problem of current flowing into the output pin.

A better solution is to add a dummy load to the output, that will adsorb the current coming from the 5V through R1 and R2. Another way to view this, is that, disconnecting the output, with the calculated value, R1-R2-R3 will form a resistor divider and the voltage across R3 would be 3.3V at most. The values indicated in the figures are expressed in terms or a generic “R” value.

When the output is 0, the voltage will be 5V * (R2/(R1+R2)), i.e. 1V, which is below the 1.5V threshold. When the output is 3.3V, the voltage will be 5V * (R2/(R1+R2)) + 3.3V * (R1/(R1+R2)) = 3.64V. Better high-level values can be achieved by adjusting the R1/R2 ratio, but you must take into account that the voltage should be smaller than 1.5V, when the output is at 0V.

Note: we took 0 and 3.3V as the CMOS output voltages, when the output is low and high, respectively. While, this time, there is no problem (unless R3 is too low) about the high level voltage (as it is pulled up by R1+R2), the low-level voltage will increase according to the current flowing into the output.

Advantages:

• Cheaperthan diode offset.

Disadvantages:

• Slowerthan the diode offset solution, especially in the high-to-low transition, asthe current flows across R1 and R2, which will have a much higher impedance,with respect to a diode.
• Requirescareful resistor value selection, to avoid damage, to get a decent speed and tokeep the high and low voltage within the correct ranges.
• Relativelyhigh current consumption.
• Requires2 to 3 additional components.
• Poornoise margins.
• Requiresa low impedance driving output.
• Requiresa relatively high input impedance.

BJT/MOSFET INVERTER

As we didin the other article, a simple MOSFET/BJT can be used, if an inverted signalcan be accepted or is desired. Otherwise, an additional stage can be used.

Advantages:

• Much simpler dimensioning, with respect to the diode offset.
• Better noise margin, as both the low and high levels are close to the rails.

Disadvantages:

• Requires2/3 external components.
• Itis inverting.
• Relativelyslow low-to-high rise time.
• TheBJT implementation is actually relatively slower, with respect to MOSFET implementation,due to the relatively slow BJT turn-off characteristics.
• Relativelyhigh consumption, when the MOSFET/BJT is in the ON state.
• Requiresa relatively high input impedance

SERIES MOSFET

In the5-to-3.3V article, we showed this little circuit, and we told that it isbidirectional. Indeed, it can be used for 3-to-5V translation too!

The workingprinciple is simple. When the output is at 3.3V, the MOSFET will be in theOFF-state, as VGS=0V, therefore the output is held at 5V by the pull-up resistor.If the output is low, then VGS is 3.3V. Assuming a MOSFET with a logic-levelthreshold (it should be fully-on when VGS = 2.5V), the MOSFET will turn on,passing the low-level value to the 5V input.

Advantages:

• Bidirectional
• Relativelysimple solution.
• Itdoes not invert the input, as the single MOSFET/BJT in common sourceconfiguration.

Disadvantages:

• Requires2 external components
• Relativelyslow.
• Requiresa low-impedance driving output to avoid overload.
• Relativelyhigh power consumption.
• Requiresa relatively high input impedance.

SERIES BJT

This is thebrother of the previous solution, except it uses a BJT. The working principleis the same (as we also explained in the previous article). It shares the samebenefits of the previous circuit, but it also introduces some additionaldrawbacks.

Advantages:

• Bidirectional
• Relativelysimple solution.
• Itdoes not invert the input, as the single MOSFET/BJT in common sourceconfiguration.

Disadvantages:

Mosfet 3.3 V Logic Circuit

• Requires 3 external components.
• Relatively slow.
• Requires a low-impedance driving output to avoid overload.
• Relatively high power consumption.
• Requires a relatively high input impedance.
• The BJT saturation collector-to emitter voltage (V_CESAT) is added to the low-level output voltage. This is normally not a big deal, though.

LEVEL TRANSLATOR IC

A dedicated level translator IC, such as 74LVC1T245, will do everything you need, with better performances with respect to discrete solutions, but at a much higher price.

There are many variants, such as with more channels (74LVC8T245, 74LVC16T245), or different logic family (74ALVT162245), with different speeds (and prices).

Use this solution when you require a high performance 3.3V to 5V level translation (typically in high speed buses, clocks, etc.)

Advantages:

• Fast (even though not as fast as the direct connection, as a small delay is added).
• High noise margin.

Disadvantages:

• Requiresa level shifter and possibly 2 decoupling capacitors (one per power domain).
• Expensive.

OPCOUPLER/ISOLATOR

As shown inthe previous article, this solution is “any voltage-to any voltage” translator,therefore it can be used also for the 3.3V to 5V translation. There are 4configurations, depending on your requirements.

Beware thatsome configurations require a strong low-level output driver (while nothing isrequested in terms of high-level output strength), while the other requires astrong high-level output driver.

Similarly,the output will provide a strong pull-up/down path (through the coupler), and aweaker one (through the pulldown/up resistor, respectively).

Mosfet 3.3 V Logic Pro

Instead ofusing standards optoisolators, you can use more recent devices, based on capacitive,giant magnetoresistive or magnetic couplings, even though these are much moreexpensive, typically.

Advantages:

• Electrical insulation.
• Better safety.
• “Any voltage to any voltage” conversion.
• You can optionally invert the signal.

Disadvantages:

• Typically slow, except when high speed isolators are used.
• Relatively expensive.
• Quite bulky device.
• High power consumption.
• You have some constraints on the output and input impedances.

Conclusions

Mosfet 3.3 V Logical

We have shown some of the main methods of interfacing a 3.3V to a 5V system! We will keep updating this post if we find some other interesting techniques! For the opposite direction, i.e. 5V to 3.3V interfacing, refer to this article!